Reconfigurable CORDIC Low-Power Implementation of Complex Signal Processing for Reducing Power Dissipation

In recent years, CORDIC algorithms has been used extensively for various image processing system& biomedical applications. By using CORDIC algorithm we can able to reducing the number of iteration to process the image in the system. Low power design is to be challenging process during system operations. Previous approaches scope to minimize the power consumption without image quality consideration. In this paper CORDIC Based Low Power DCT iterations process equally based upon their image quality. An hardware implementation of ROM & control logic circuit to require large hardware space in this system. Look-ahead CORDIC Approach is used to finish the iteration at one time. When reducing hardware area & reducing number of iterations for maximize battery lifetime. This idea used to achieve the low power design of image and video compression application